| 1 | /* | 
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| 2 | * Copyright (c) 2019 Apple Inc. All rights reserved. | 
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| 3 | * | 
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| 4 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ | 
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| 5 | * | 
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| 6 | * This file contains Original Code and/or Modifications of Original Code | 
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| 7 | * as defined in and that are subject to the Apple Public Source License | 
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| 8 | * Version 2.0 (the 'License'). You may not use this file except in | 
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| 9 | * compliance with the License. The rights granted to you under the License | 
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| 10 | * may not be used to create, or enable the creation or redistribution of, | 
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| 11 | * unlawful or unlicensed copies of an Apple operating system, or to | 
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| 12 | * circumvent, violate, or enable the circumvention or violation of, any | 
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| 13 | * terms of an Apple operating system software license agreement. | 
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| 14 | * | 
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| 15 | * Please obtain a copy of the License at | 
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| 16 | * http://www.opensource.apple.com/apsl/ and read it before using this file. | 
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| 17 | * | 
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| 18 | * The Original Code and all software distributed under the License are | 
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| 19 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | 
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| 20 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | 
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| 21 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | 
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| 22 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. | 
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| 23 | * Please see the License for the specific language governing rights and | 
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| 24 | * limitations under the License. | 
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| 25 | * | 
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| 26 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ | 
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| 27 | */ | 
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| 28 |  | 
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| 29 | #include <mach/mach_types.h> | 
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| 30 | #include <mach/machine.h> | 
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| 31 | #include <machine/machine_routines.h> | 
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| 32 | #include <machine/sched_param.h> | 
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| 33 | #include <machine/machine_cpu.h> | 
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| 34 | #include <kern/kern_types.h> | 
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| 35 | #include <kern/debug.h> | 
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| 36 | #include <kern/machine.h> | 
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| 37 | #include <kern/misc_protos.h> | 
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| 38 | #include <kern/processor.h> | 
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| 39 | #include <kern/queue.h> | 
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| 40 | #include <kern/sched.h> | 
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| 41 | #include <kern/sched_prim.h> | 
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| 42 | #include <kern/task.h> | 
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| 43 | #include <kern/thread.h> | 
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| 44 | #include <machine/atomic.h> | 
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| 45 | #include <sys/kdebug.h> | 
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| 46 | #include <kern/sched_amp_common.h> | 
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| 47 | #include <stdatomic.h> | 
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| 48 |  | 
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| 49 | #if __AMP__ | 
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| 50 |  | 
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| 51 | /* Exported globals */ | 
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| 52 | processor_set_t ecore_set = NULL; | 
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| 53 | processor_set_t pcore_set = NULL; | 
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| 54 |  | 
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| 55 | /* | 
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| 56 | * sched_amp_init() | 
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| 57 | * | 
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| 58 | * Initialize the pcore_set and ecore_set globals which describe the | 
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| 59 | * P/E processor sets. | 
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| 60 | */ | 
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| 61 | void | 
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| 62 | sched_amp_init(void) | 
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| 63 | { | 
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| 64 | sched_timeshare_init(); | 
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| 65 | } | 
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| 66 |  | 
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| 67 | /* Spill threshold load average is ncpus in pset + (sched_amp_spill_count/(1 << PSET_LOAD_FRACTIONAL_SHIFT) */ | 
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| 68 | int sched_amp_spill_count = 3; | 
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| 69 | int sched_amp_idle_steal = 1; | 
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| 70 | int sched_amp_spill_steal = 1; | 
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| 71 |  | 
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| 72 | /* | 
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| 73 | * We see performance gains from doing immediate IPIs to P-cores to run | 
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| 74 | * P-eligible threads and lesser P-E migrations from using deferred IPIs | 
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| 75 | * for spill. | 
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| 76 | */ | 
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| 77 | int sched_amp_spill_deferred_ipi = 1; | 
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| 78 | int sched_amp_pcores_preempt_immediate_ipi = 1; | 
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| 79 |  | 
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| 80 | /* | 
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| 81 | * sched_perfcontrol_inherit_recommendation_from_tg changes amp | 
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| 82 | * scheduling policy away from default and allows policy to be | 
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| 83 | * modified at run-time. | 
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| 84 | * | 
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| 85 | * once modified from default, the policy toggles between "follow | 
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| 86 | * thread group" and "restrict to e". | 
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| 87 | */ | 
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| 88 |  | 
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| 89 | _Atomic sched_perfctl_class_policy_t sched_perfctl_policy_util = SCHED_PERFCTL_POLICY_DEFAULT; | 
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| 90 | _Atomic sched_perfctl_class_policy_t sched_perfctl_policy_bg = SCHED_PERFCTL_POLICY_DEFAULT; | 
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| 91 |  | 
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| 92 | /* | 
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| 93 | * sched_amp_spill_threshold() | 
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| 94 | * | 
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| 95 | * Routine to calulate spill threshold which decides if cluster should spill. | 
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| 96 | */ | 
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| 97 | int | 
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| 98 | sched_amp_spill_threshold(processor_set_t pset) | 
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| 99 | { | 
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| 100 | int recommended_processor_count = bit_count(pset->recommended_bitmask & pset->cpu_bitmask); | 
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| 101 |  | 
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| 102 | return (recommended_processor_count << PSET_LOAD_FRACTIONAL_SHIFT) + sched_amp_spill_count; | 
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| 103 | } | 
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| 104 |  | 
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| 105 | /* | 
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| 106 | * pset_signal_spill() | 
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| 107 | * | 
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| 108 | * Routine to signal a running/idle CPU to cause a spill onto that CPU. | 
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| 109 | * Called with pset locked, returns unlocked | 
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| 110 | */ | 
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| 111 | void | 
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| 112 | pset_signal_spill(processor_set_t pset, int spilled_thread_priority) | 
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| 113 | { | 
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| 114 | processor_t processor; | 
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| 115 | sched_ipi_type_t ipi_type = SCHED_IPI_NONE; | 
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| 116 |  | 
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| 117 | uint64_t idle_map = pset->recommended_bitmask & pset->cpu_state_map[PROCESSOR_IDLE]; | 
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| 118 | for (int cpuid = lsb_first(idle_map); cpuid >= 0; cpuid = lsb_next(idle_map, cpuid)) { | 
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| 119 | processor = processor_array[cpuid]; | 
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| 120 | if (bit_set_if_clear(pset->pending_spill_cpu_mask, processor->cpu_id)) { | 
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| 121 | KDBG(MACHDBG_CODE(DBG_MACH_SCHED, MACH_AMP_SIGNAL_SPILL) | DBG_FUNC_NONE, processor->cpu_id, 0, 0, 0); | 
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| 122 |  | 
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| 123 | processor->deadline = UINT64_MAX; | 
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| 124 |  | 
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| 125 | if (processor == current_processor()) { | 
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| 126 | pset_update_processor_state(pset, processor, PROCESSOR_DISPATCHING); | 
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| 127 | if (bit_set_if_clear(pset->pending_AST_URGENT_cpu_mask, processor->cpu_id)) { | 
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| 128 | KDBG(MACHDBG_CODE(DBG_MACH_SCHED, MACH_PENDING_AST_URGENT) | DBG_FUNC_START, | 
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| 129 | processor->cpu_id, pset->pending_AST_URGENT_cpu_mask, 0, 6); | 
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| 130 | } | 
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| 131 | } else { | 
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| 132 | ipi_type = sched_ipi_action(processor, NULL, SCHED_IPI_EVENT_SPILL); | 
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| 133 | } | 
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| 134 | pset_unlock(pset); | 
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| 135 | sched_ipi_perform(processor, ipi_type); | 
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| 136 | return; | 
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| 137 | } | 
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| 138 | } | 
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| 139 |  | 
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| 140 | processor_t ast_processor = NULL; | 
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| 141 | ast_t preempt = AST_NONE; | 
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| 142 | uint64_t running_map = pset->recommended_bitmask & pset->cpu_state_map[PROCESSOR_RUNNING]; | 
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| 143 | for (int cpuid = lsb_first(running_map); cpuid >= 0; cpuid = lsb_next(running_map, cpuid)) { | 
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| 144 | processor = processor_array[cpuid]; | 
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| 145 | if (processor->current_recommended_pset_type == PSET_AMP_P) { | 
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| 146 | /* Already running a spilled P-core recommended thread */ | 
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| 147 | continue; | 
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| 148 | } | 
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| 149 | if (bit_test(pset->pending_spill_cpu_mask, processor->cpu_id)) { | 
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| 150 | /* Already received a spill signal */ | 
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| 151 | continue; | 
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| 152 | } | 
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| 153 | if (processor->current_pri >= spilled_thread_priority) { | 
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| 154 | /* Already running a higher or equal priority thread */ | 
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| 155 | continue; | 
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| 156 | } | 
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| 157 |  | 
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| 158 | /* Found a suitable processor */ | 
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| 159 | bit_set(pset->pending_spill_cpu_mask, processor->cpu_id); | 
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| 160 | KDBG(MACHDBG_CODE(DBG_MACH_SCHED, MACH_AMP_SIGNAL_SPILL) | DBG_FUNC_NONE, processor->cpu_id, 1, 0, 0); | 
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| 161 | if (processor == current_processor()) { | 
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| 162 | preempt = AST_PREEMPT; | 
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| 163 | } | 
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| 164 | ipi_type = sched_ipi_action(processor, NULL, SCHED_IPI_EVENT_SPILL); | 
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| 165 | if (ipi_type != SCHED_IPI_NONE) { | 
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| 166 | ast_processor = processor; | 
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| 167 | } | 
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| 168 | break; | 
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| 169 | } | 
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| 170 |  | 
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| 171 | pset_unlock(pset); | 
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| 172 | sched_ipi_perform(ast_processor, ipi_type); | 
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| 173 |  | 
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| 174 | if (preempt != AST_NONE) { | 
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| 175 | ast_t new_preempt = update_pending_nonurgent_preemption(processor, preempt); | 
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| 176 | ast_on(new_preempt); | 
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| 177 | } | 
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| 178 | } | 
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| 179 |  | 
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| 180 | /* | 
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| 181 | * pset_should_accept_spilled_thread() | 
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| 182 | * | 
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| 183 | * Routine to decide if pset should accept spilled threads. | 
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| 184 | * This function must be safe to call (to use as a hint) without holding the pset lock. | 
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| 185 | */ | 
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| 186 | bool | 
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| 187 | pset_should_accept_spilled_thread(processor_set_t pset, int spilled_thread_priority) | 
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| 188 | { | 
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| 189 | if (!pset) { | 
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| 190 | return false; | 
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| 191 | } | 
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| 192 |  | 
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| 193 | if ((pset->recommended_bitmask & pset->cpu_state_map[PROCESSOR_IDLE]) != 0) { | 
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| 194 | return true; | 
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| 195 | } | 
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| 196 |  | 
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| 197 | uint64_t cpu_map = (pset->recommended_bitmask & pset->cpu_state_map[PROCESSOR_RUNNING]); | 
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| 198 |  | 
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| 199 | for (int cpuid = lsb_first(cpu_map); cpuid >= 0; cpuid = lsb_next(cpu_map, cpuid)) { | 
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| 200 | processor_t processor = processor_array[cpuid]; | 
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| 201 |  | 
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| 202 | if (processor->current_recommended_pset_type == PSET_AMP_P) { | 
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| 203 | /* This processor is already running a spilled thread */ | 
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| 204 | continue; | 
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| 205 | } | 
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| 206 |  | 
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| 207 | if (processor->current_pri < spilled_thread_priority) { | 
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| 208 | return true; | 
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| 209 | } | 
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| 210 | } | 
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| 211 |  | 
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| 212 | return false; | 
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| 213 | } | 
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| 214 |  | 
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| 215 | /* | 
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| 216 | * should_spill_to_ecores() | 
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| 217 | * | 
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| 218 | * Spill policy is implemented here | 
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| 219 | */ | 
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| 220 | bool | 
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| 221 | should_spill_to_ecores(processor_set_t nset, thread_t thread) | 
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| 222 | { | 
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| 223 | if (nset->pset_cluster_type == PSET_AMP_E) { | 
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| 224 | /* Not relevant if ecores already preferred */ | 
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| 225 | return false; | 
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| 226 | } | 
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| 227 |  | 
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| 228 | if (!pset_is_recommended(ecore_set)) { | 
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| 229 | /* E cores must be recommended */ | 
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| 230 | return false; | 
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| 231 | } | 
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| 232 |  | 
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| 233 | if (thread->th_bound_cluster_id == pcore_set->pset_id) { | 
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| 234 | /* Thread bound to the P-cluster */ | 
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| 235 | return false; | 
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| 236 | } | 
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| 237 |  | 
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| 238 | if (thread->sched_pri >= BASEPRI_RTQUEUES) { | 
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| 239 | /* Never spill realtime threads */ | 
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| 240 | return false; | 
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| 241 | } | 
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| 242 |  | 
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| 243 | if ((nset->recommended_bitmask & nset->cpu_state_map[PROCESSOR_IDLE]) != 0) { | 
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| 244 | /* Don't spill if idle cores */ | 
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| 245 | return false; | 
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| 246 | } | 
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| 247 |  | 
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| 248 | if ((sched_get_pset_load_average(nset, 0) >= sched_amp_spill_threshold(nset)) &&  /* There is already a load on P cores */ | 
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| 249 | pset_should_accept_spilled_thread(ecore_set, thread->sched_pri)) { /* There are lower priority E cores */ | 
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| 250 | return true; | 
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| 251 | } | 
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| 252 |  | 
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| 253 | return false; | 
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| 254 | } | 
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| 255 |  | 
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| 256 | /* | 
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| 257 | * sched_amp_check_spill() | 
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| 258 | * | 
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| 259 | * Routine to check if the thread should be spilled and signal the pset if needed. | 
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| 260 | */ | 
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| 261 | void | 
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| 262 | sched_amp_check_spill(processor_set_t pset, thread_t thread) | 
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| 263 | { | 
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| 264 | /* pset is unlocked */ | 
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| 265 |  | 
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| 266 | /* Bound threads don't call this function */ | 
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| 267 | assert(thread->bound_processor == PROCESSOR_NULL); | 
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| 268 |  | 
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| 269 | if (should_spill_to_ecores(pset, thread)) { | 
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| 270 | pset_lock(ecore_set); | 
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| 271 |  | 
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| 272 | pset_signal_spill(ecore_set, thread->sched_pri); | 
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| 273 | /* returns with ecore_set unlocked */ | 
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| 274 | } | 
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| 275 | } | 
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| 276 |  | 
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| 277 | /* | 
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| 278 | * sched_amp_steal_threshold() | 
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| 279 | * | 
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| 280 | * Routine to calculate the steal threshold | 
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| 281 | */ | 
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| 282 | int | 
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| 283 | sched_amp_steal_threshold(processor_set_t pset, bool spill_pending) | 
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| 284 | { | 
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| 285 | int recommended_processor_count = bit_count(pset->recommended_bitmask & pset->cpu_bitmask); | 
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| 286 |  | 
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| 287 | return (recommended_processor_count << PSET_LOAD_FRACTIONAL_SHIFT) + (spill_pending ? sched_amp_spill_steal : sched_amp_idle_steal); | 
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| 288 | } | 
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| 289 |  | 
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| 290 | /* | 
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| 291 | * sched_amp_steal_thread_enabled() | 
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| 292 | * | 
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| 293 | */ | 
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| 294 | bool | 
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| 295 | sched_amp_steal_thread_enabled(processor_set_t pset) | 
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| 296 | { | 
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| 297 | return (pset->pset_cluster_type == PSET_AMP_E) && (pcore_set != NULL) && (pcore_set->online_processor_count > 0); | 
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| 298 | } | 
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| 299 |  | 
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| 300 | /* | 
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| 301 | * sched_amp_balance() | 
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| 302 | * | 
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| 303 | * Invoked with pset locked, returns with pset unlocked | 
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| 304 | */ | 
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| 305 | bool | 
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| 306 | sched_amp_balance(processor_t cprocessor, processor_set_t cpset) | 
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| 307 | { | 
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| 308 | assert(cprocessor == current_processor()); | 
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| 309 |  | 
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| 310 | pset_unlock(cpset); | 
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| 311 |  | 
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| 312 | if (!ecore_set || cpset->pset_cluster_type == PSET_AMP_E || !cprocessor->is_recommended) { | 
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| 313 | return false; | 
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| 314 | } | 
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| 315 |  | 
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| 316 | /* | 
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| 317 | * cprocessor is an idle, recommended P core processor. | 
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| 318 | * Look for P-eligible threads that have spilled to an E core | 
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| 319 | * and coax them to come back. | 
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| 320 | */ | 
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| 321 | processor_set_t pset = ecore_set; | 
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| 322 |  | 
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| 323 | pset_lock(pset); | 
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| 324 |  | 
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| 325 | processor_t eprocessor; | 
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| 326 | uint64_t ast_processor_map = 0; | 
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| 327 |  | 
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| 328 | sched_ipi_type_t ipi_type[MAX_CPUS] = {SCHED_IPI_NONE}; | 
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| 329 | uint64_t running_map = pset->cpu_state_map[PROCESSOR_RUNNING]; | 
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| 330 | for (int cpuid = lsb_first(running_map); cpuid >= 0; cpuid = lsb_next(running_map, cpuid)) { | 
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| 331 | eprocessor = processor_array[cpuid]; | 
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| 332 | if ((eprocessor->current_pri < BASEPRI_RTQUEUES) && | 
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| 333 | (eprocessor->current_recommended_pset_type == PSET_AMP_P)) { | 
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| 334 | ipi_type[eprocessor->cpu_id] = sched_ipi_action(eprocessor, NULL, SCHED_IPI_EVENT_REBALANCE); | 
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| 335 | if (ipi_type[eprocessor->cpu_id] != SCHED_IPI_NONE) { | 
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| 336 | bit_set(ast_processor_map, eprocessor->cpu_id); | 
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| 337 | assert(eprocessor != cprocessor); | 
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| 338 | } | 
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| 339 | } | 
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| 340 | } | 
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| 341 |  | 
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| 342 | pset_unlock(pset); | 
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| 343 |  | 
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| 344 | for (int cpuid = lsb_first(ast_processor_map); cpuid >= 0; cpuid = lsb_next(ast_processor_map, cpuid)) { | 
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| 345 | processor_t ast_processor = processor_array[cpuid]; | 
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| 346 | sched_ipi_perform(ast_processor, ipi_type[cpuid]); | 
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| 347 | } | 
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| 348 |  | 
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| 349 | /* Core should light-weight idle using WFE if it just sent out rebalance IPIs */ | 
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| 350 | return ast_processor_map != 0; | 
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| 351 | } | 
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| 352 |  | 
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| 353 | /* | 
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| 354 | * Helper function for sched_amp_thread_group_recommendation_change() | 
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| 355 | * Find all the cores in the pset running threads from the thread_group tg | 
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| 356 | * and send them a rebalance interrupt. | 
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| 357 | */ | 
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| 358 | void | 
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| 359 | sched_amp_bounce_thread_group_from_ecores(processor_set_t pset, struct thread_group *tg) | 
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| 360 | { | 
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| 361 | if (!pset) { | 
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| 362 | return; | 
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| 363 | } | 
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| 364 |  | 
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| 365 | assert(pset->pset_cluster_type == PSET_AMP_E); | 
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| 366 | uint64_t ast_processor_map = 0; | 
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| 367 | sched_ipi_type_t ipi_type[MAX_CPUS] = {SCHED_IPI_NONE}; | 
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| 368 |  | 
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| 369 | spl_t s = splsched(); | 
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| 370 | pset_lock(pset); | 
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| 371 |  | 
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| 372 | uint64_t running_map = pset->cpu_state_map[PROCESSOR_RUNNING]; | 
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| 373 | for (int cpuid = lsb_first(running_map); cpuid >= 0; cpuid = lsb_next(running_map, cpuid)) { | 
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| 374 | processor_t eprocessor = processor_array[cpuid]; | 
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| 375 | if (eprocessor->current_thread_group == tg) { | 
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| 376 | ipi_type[eprocessor->cpu_id] = sched_ipi_action(eprocessor, NULL, SCHED_IPI_EVENT_REBALANCE); | 
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| 377 | if (ipi_type[eprocessor->cpu_id] != SCHED_IPI_NONE) { | 
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| 378 | bit_set(ast_processor_map, eprocessor->cpu_id); | 
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| 379 | } else if (eprocessor == current_processor()) { | 
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| 380 | ast_on(AST_PREEMPT); | 
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| 381 | bit_set(pset->pending_AST_PREEMPT_cpu_mask, eprocessor->cpu_id); | 
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| 382 | } | 
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| 383 | } | 
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| 384 | } | 
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| 385 |  | 
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| 386 | KDBG(MACHDBG_CODE(DBG_MACH_SCHED, MACH_AMP_RECOMMENDATION_CHANGE) | DBG_FUNC_NONE, tg, ast_processor_map, 0, 0); | 
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| 387 |  | 
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| 388 | pset_unlock(pset); | 
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| 389 |  | 
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| 390 | for (int cpuid = lsb_first(ast_processor_map); cpuid >= 0; cpuid = lsb_next(ast_processor_map, cpuid)) { | 
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| 391 | processor_t ast_processor = processor_array[cpuid]; | 
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| 392 | sched_ipi_perform(ast_processor, ipi_type[cpuid]); | 
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| 393 | } | 
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| 394 |  | 
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| 395 | splx(s); | 
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| 396 | } | 
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| 397 |  | 
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| 398 | /* | 
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| 399 | * sched_amp_ipi_policy() | 
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| 400 | */ | 
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| 401 | sched_ipi_type_t | 
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| 402 | sched_amp_ipi_policy(processor_t dst, thread_t thread, boolean_t dst_idle, sched_ipi_event_t event) | 
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| 403 | { | 
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| 404 | processor_set_t pset = dst->processor_set; | 
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| 405 | assert(dst != current_processor()); | 
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| 406 |  | 
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| 407 | boolean_t deferred_ipi_supported = false; | 
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| 408 | #if defined(CONFIG_SCHED_DEFERRED_AST) | 
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| 409 | deferred_ipi_supported = true; | 
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| 410 | #endif /* CONFIG_SCHED_DEFERRED_AST */ | 
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| 411 |  | 
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| 412 | switch (event) { | 
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| 413 | case SCHED_IPI_EVENT_SPILL: | 
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| 414 | /* For Spill event, use deferred IPIs if sched_amp_spill_deferred_ipi set */ | 
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| 415 | if (deferred_ipi_supported && sched_amp_spill_deferred_ipi) { | 
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| 416 | return sched_ipi_deferred_policy(pset, dst, thread, event); | 
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| 417 | } | 
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| 418 | break; | 
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| 419 | case SCHED_IPI_EVENT_PREEMPT: | 
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| 420 | /* For preemption, the default policy is to use deferred IPIs | 
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| 421 | * for Non-RT P-core preemption. Override that behavior if | 
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| 422 | * sched_amp_pcores_preempt_immediate_ipi is set | 
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| 423 | */ | 
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| 424 | if (thread && thread->sched_pri < BASEPRI_RTQUEUES) { | 
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| 425 | if (sched_amp_pcores_preempt_immediate_ipi && (pset == pcore_set)) { | 
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| 426 | return dst_idle ? SCHED_IPI_IDLE : SCHED_IPI_IMMEDIATE; | 
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| 427 | } | 
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| 428 | } | 
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| 429 | break; | 
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| 430 | default: | 
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| 431 | break; | 
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| 432 | } | 
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| 433 | /* Default back to the global policy for all other scenarios */ | 
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| 434 | return sched_ipi_policy(dst, thread, dst_idle, event); | 
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| 435 | } | 
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| 436 |  | 
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| 437 | /* | 
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| 438 | * sched_amp_qos_max_parallelism() | 
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| 439 | */ | 
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| 440 | uint32_t | 
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| 441 | sched_amp_qos_max_parallelism(int qos, uint64_t options) | 
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| 442 | { | 
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| 443 | uint32_t ecount = ecore_set ? ecore_set->cpu_set_count : 0; | 
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| 444 | uint32_t pcount = pcore_set ? pcore_set->cpu_set_count : 0; | 
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| 445 |  | 
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| 446 | /* | 
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| 447 | * The AMP scheduler does not support more than 1 of each type of cluster | 
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| 448 | * but the P-cluster is optional (e.g. watchOS) | 
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| 449 | */ | 
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| 450 | uint32_t ecluster_count = ecount ? 1 : 0; | 
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| 451 | uint32_t pcluster_count = pcount ? 1 : 0; | 
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| 452 |  | 
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| 453 | if (options & QOS_PARALLELISM_REALTIME) { | 
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| 454 | /* For realtime threads on AMP, we would want them | 
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| 455 | * to limit the width to just the P-cores since we | 
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| 456 | * do not spill/rebalance for RT threads. | 
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| 457 | */ | 
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| 458 | return (options & QOS_PARALLELISM_CLUSTER_SHARED_RESOURCE) ? pcluster_count : pcount; | 
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| 459 | } | 
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| 460 |  | 
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| 461 | /* | 
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| 462 | * The default AMP scheduler policy is to run utility and by | 
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| 463 | * threads on E-Cores only.  Run-time policy adjustment unlocks | 
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| 464 | * ability of utility and bg to threads to be scheduled based on | 
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| 465 | * run-time conditions. | 
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| 466 | */ | 
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| 467 | switch (qos) { | 
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| 468 | case THREAD_QOS_UTILITY: | 
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| 469 | if (os_atomic_load(&sched_perfctl_policy_util, relaxed) == SCHED_PERFCTL_POLICY_DEFAULT) { | 
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| 470 | return (options & QOS_PARALLELISM_CLUSTER_SHARED_RESOURCE) ? ecluster_count : ecount; | 
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| 471 | } else { | 
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| 472 | return (options & QOS_PARALLELISM_CLUSTER_SHARED_RESOURCE) ? (ecluster_count + pcluster_count) : (ecount + pcount); | 
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| 473 | } | 
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| 474 | case THREAD_QOS_BACKGROUND: | 
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| 475 | case THREAD_QOS_MAINTENANCE: | 
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| 476 | if (os_atomic_load(&sched_perfctl_policy_bg, relaxed) == SCHED_PERFCTL_POLICY_DEFAULT) { | 
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| 477 | return (options & QOS_PARALLELISM_CLUSTER_SHARED_RESOURCE) ? ecluster_count : ecount; | 
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| 478 | } else { | 
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| 479 | return (options & QOS_PARALLELISM_CLUSTER_SHARED_RESOURCE) ? (ecluster_count + pcluster_count) : (ecount + pcount); | 
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| 480 | } | 
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| 481 | default: | 
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| 482 | return (options & QOS_PARALLELISM_CLUSTER_SHARED_RESOURCE) ? (ecluster_count + pcluster_count) : (ecount + pcount); | 
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| 483 | } | 
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| 484 | } | 
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| 485 |  | 
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| 486 | pset_node_t | 
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| 487 | sched_amp_choose_node(thread_t thread) | 
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| 488 | { | 
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| 489 | pset_node_t node = (recommended_pset_type(thread) == PSET_AMP_P) ? pcore_node : ecore_node; | 
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| 490 | return ((node != NULL) && (node->pset_map != 0)) ? node : &pset_node0; | 
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| 491 | } | 
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| 492 |  | 
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| 493 | #endif /* __AMP__ */ | 
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| 494 |  | 
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