1/*
2 * Copyright (c) 2017 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28#ifndef _ARM64_MACHINE_CPUID_H_
29#define _ARM64_MACHINE_CPUID_H_
30
31typedef struct {
32uint64_t el0_not_implemented : 1,
33 el0_aarch64_only : 1,
34 el0_aarch32_and_64 : 1,
35 el1_not_implemented : 1,
36 el1_aarch64_only : 1,
37 el1_aarch32_and_64 : 1,
38 el2_not_implemented : 1,
39 el2_aarch64_only : 1,
40 el2_aarch32_and_64 : 1,
41 el3_not_implemented : 1,
42 el3_aarch64_only : 1,
43 el3_aarch32_and_64 : 1,
44 reserved : 52;
45} arm_feature_bits_t;
46
47/* Debug identification */
48
49/* ID_AA64DFR0_EL1 */
50typedef union {
51 struct {
52 uint64_t debug_arch_version : 4,
53 trace_extn_version : 4,
54 perf_extn_version : 4,
55 brps : 4,
56 reserved0 : 4,
57 wrps : 4,
58 reserved1 : 4,
59 ctx_cmps : 4,
60 reserved32 : 32;
61 } debug_feature;
62 uint64_t value;
63} arm_cpuid_id_aa64dfr0_el1;
64
65typedef struct {
66 uint32_t num_watchpoint_pairs;
67 uint32_t num_breakpoint_pairs;
68} arm_debug_info_t;
69
70#endif /* _MACHINE_CPUID_H_ */
71