1/*
2 * Copyright (c) 2007 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28#ifndef _ARM_CACHES_INTERNAL
29#define _ARM_CACHES_INTERNAL 1
30
31#include <arm/proc_reg.h>
32
33#include <kern/kern_types.h>
34
35extern void flush_dcache_syscall( vm_offset_t addr, unsigned length);
36
37#ifdef MACH_KERNEL_PRIVATE
38extern void flush_dcache(vm_offset_t addr, unsigned count, int phys);
39extern void flush_dcache64(addr64_t addr, unsigned count, int phys);
40extern void invalidate_icache(vm_offset_t addr, unsigned cnt, int phys);
41extern void invalidate_icache64(addr64_t addr, unsigned cnt, int phys);
42
43#if __ARM_SMP__ && defined(ARMA7)
44#define LWFlush 1
45#define LWClean 2
46extern void cache_xcall(unsigned int op);
47extern void cache_xcall_handler(unsigned int op);
48#endif
49#endif
50extern void clean_dcache(vm_offset_t addr, unsigned count, int phys);
51extern void clean_dcache64(addr64_t addr, unsigned count, int phys);
52
53extern void CleanPoC_Dcache(void);
54extern void CleanPoU_Dcache(void);
55
56/*
57 * May not actually perform a flush on platforms
58 * where AP caches are snooped by all agents on SoC.
59 *
60 * This is the one you need unless you really know what
61 * you're doing.
62 */
63extern void CleanPoC_DcacheRegion(vm_offset_t va, unsigned length);
64
65/*
66 * Always actually flushes the cache, even on platforms
67 * where AP caches are snooped by all agents. You
68 * probably don't need to use this. Intended for use in
69 * panic save routine (where caches will be yanked by reset
70 * and coherency doesn't help).
71 */
72extern void CleanPoC_DcacheRegion_Force(vm_offset_t va, unsigned length);
73
74extern void CleanPoU_DcacheRegion(vm_offset_t va, unsigned length);
75
76extern void FlushPoC_Dcache(void);
77extern void FlushPoU_Dcache(void);
78extern void FlushPoC_DcacheRegion(vm_offset_t va, unsigned length);
79
80#ifdef __arm__
81extern void invalidate_mmu_cache(void);
82extern void invalidate_mmu_dcache(void);
83extern void invalidate_mmu_dcache_region(vm_offset_t va, unsigned length);
84#endif
85
86extern void InvalidatePoU_Icache(void);
87extern void InvalidatePoU_IcacheRegion(vm_offset_t va, unsigned length);
88
89extern void cache_sync_page(ppnum_t pp);
90
91extern void platform_cache_init(void);
92extern void platform_cache_idle_enter(void);
93extern void platform_cache_idle_exit(void);
94extern void platform_cache_flush(void);
95extern boolean_t platform_cache_batch_wimg(unsigned int new_wimg, unsigned int size);
96extern void platform_cache_flush_wimg(unsigned int new_wimg);
97extern void platform_cache_clean(void);
98extern void platform_cache_shutdown(void);
99extern void platform_cache_disable(void);
100
101#endif /* #ifndef _ARM_CACHES_INTERNAL */
102