1. Check the connections between your programmer and the AVR (perhaps one of the leads have fallen out or one of the solder joints are damaged)
2. The clock fuses are set for a source you aren’t providing, for more information on fixing this read below
3. The SPIEN (SPI enable) fuse has been unprogrammed, this means that you can no longer program with a standard serial programmer (such as a USBTinyISP), to fix this you need a high voltage parallel programmer, for example MightyOhm’s High Voltage Rescue Shield (an arduino is required) or the Atmel AVR Dragon

By obtaining an ATTiny13 (or a similar, cheap AVR) you can fix any clock settings. There are a few steps required to get this to work as your clock:

1. Download and compile this program (which will create a square wave out of PB4, pin 3 of the ATTiny13), clock.S (you’ll need an AVR ASM compiler like AVRA and the include file for your AVR, you can download tn13def.inc for an ATTiny13) OR if you’re using an ATTiny13 you can download this precompiled clock.hex
2. Burn the compiled clock.hex to the AVR, for example (for an ATTiny13, using a USBTinyISP):
   $ avrdude -p t13 -c usbtiny -U flash:w:clock.hex
3. Unprogram the CKDIV8 fuse (increasing the outputted frequency by 8 times), for example (for an ATTiny13, using a USBTinyISP):
   $ avrdude -p t13 -c usbtiny -U lfuse:w:0x7a:m
4. Connect PB4, pin 3 (or whatever you set the port to be in clock.S) of the clock AVR to the XTAL1 pin of the broken AVR
5. Use a fuse calculator to calculate your fixed clock settings, type in the avrdude command to change the fuses and append -B 50, this’ll slow the clock period so that the AVR can keep up with the SCK clock (at avrdude’s default value of 10usec the clock generated by the ATTiny13 isn’t fast enough to allow the target AVR to receive instructions, a period of 50usec should be fine, but increasing it won’t hurt only cause it to program slower), for example (for an ATMega328P, using a USBTinyISP):
   $ avrdude -p m328p -c usbtiny -B 50 -U lfuse:w:0x62:m -U hfuse:w:0xd9:m -U efuse:w:0xff:m

Version Differences

There are a few differences between the two target boards:

• The large target board is designed for 40 and 28 pin AVRs (the ATMega’s), while the small one is for the 20 and 8 pin AVRs (the ATTiny’s).
• The large board has one ZIF socket for each size of AVR, while the small one has one ZIF socket for both sizes (with a size jumper to select the size, more details below)
• The large target board has two (selectable) clock sources available; a crystal (I used an 8MHz one) and an ATTiny13 providing a clock for boards with bad clock fuse settings. The small target board has the ability to add a clock source in (XTAL1 and XTAL2 lines have been designed in, however no clock source has been designed).

Clock Source

There are three clocking options with the large board:

• No clock: Remove all jumper shunts
• The ATTiny clock: Insert a jumper shunt into the right jumper
• The crystal clock: Insert two jumper shunts, one into the center jumper and the other on the left.

Setting up the ATTiny13 clock

To setup the ATTiny13 clock you need to unprogram the CKDIV8 fuse on the ATTiny13 (for an excellent fuse calculator visit http://www.engbedded.com/fusecalc/) and burn a program that will oscillate PortB4 of the ATTiny. I have written a basic program, you can download the source file, clock.S, and compile yourself with an AVR ASM programmer like AVRA (you will need the ATTiny13 include file, tn13def.inc) or simply download the precompiled clock.hex. You should now have an ATTiny13 creating a square wave at ~1.4MHz, perfect for our needs.

Chip Select (between 8 and 20 pin ATTiny’s)

In order to combine the 8 and 20 pin sockets into one I have added a setting jumper under the socket; to program an 8 pin AVR (for example an ATTiny13) place the jumper shunt on the left and on the right to program a 20 pin AVR (for example the ATTiny2313).

Notes, Schematics and Veroboard layout

• Pin one for the AVR ISP headers and the AVR microcontroller sockets is always the bottom left one (when the socket is oriented to be under the ISP header).
• The target board in the images is missing the 10k resistor between pin 1 of the ATTiny13 clock and VCC, I would recommend installing it.

Here are the schematics (also in SCH, for EAGLE) and the veroboard layout (these are for the all-in-one version):

Also, images of the undersides:

After I have it all soldered together and have it running some software I’ll post more details on what I’ve done, for now all I have are plans.

I based it off a feed I used a few years ago, which is hosted at https://github.com/tarka/Whirlpool. However I wanted each post to have its own item in the feed, so I rewrote tarka’s version. My greatest problem was that the pubDate field requires a RFC 2822 formatted time stamp. Whirlpool not providing that on their page I began writing up a parser module that could handle each website and parse the date from there; however I found that whirlpool had too many sources, many of which don’t provide the time their article was published. My final solution was simply to set each article to be published at 10am AEST, which isn’t great but it was better than any other method I could think of (including stuff with databases and a mixture of database + parsers).

I have put the source code up here: http://fergofrog.com/wproundup/roundup2rss.py. It is released under GPL 2.0, if you want a copy of the license you can find it at http://fergofrog.com/wproundup/gpl-2.0.txt. Feel free to adapt it to your needs, or to another website, that’s why it is released under GPL. If you do use it, then feel free to leave a comment about it, I’ll be interested to see what you have done.

If you notice any problems with the feed please let me know in the comments, or my email address is in the source code.